The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
A resistive random access memory (RRAM) array includes RRAM cells arranged at intersections of word lines and bit lines. A RRAM cell includes an insulating material as a resistive element. The resistance of the insulating material increases when current is passed through the insulating material in one direction and decreases when current is passed through the insulating material in an opposite direction. Accordingly, the RRAM cell can be programmed to a high resistance state by passing current through the RRAM cell in one direction and a low resistance state by passing current through the RRAM cell in an opposite direction. The high resistance state can be used to denote logic high (binary 1), and the low resistance state can be used to denote logic low (binary 0), or vice versa.
RRAM cells that are programmed to high and low resistance states using currents of opposite polarities are called bipolar RRAM cells. Alternatively, RRAM cells can be programmed to high and low resistance states by passing currents of two different magnitudes in the same direction through the insulating material of the RRAM cells. RRAM cells that are programmed to high and low resistance states using currents of two different magnitudes in the same direction are called unipolar RRAM cells.
Each RRAM cell includes a switching element such as a diode or a transistor. The switching element is connected in series with the insulating material (i.e., the resistive element). Using the switching element, the RRAM cells in the RRAM array can be selected and deselected during read and write operations.